Advances in semiconductor manufacturing technology have resulted in ever decreasing physical dimensions for the various circuit elements, such as, for example, field effect transistors, which are used in forming integrated circuits. In turn, the smaller dimensions of such circuit elements have allowed the integration onto a single chip of many more transistors than was possible in the past.
As is well-known in the field of integrated circuits, reducing the dimensions of circuit elements generally, and of the field effect transistor (FET) in particular, requires a corresponding reduction in the power supply voltage in order to avoid electric field strengths within the integrated circuit which might result in dielectric breakdown, or other adverse effects. Additionally, transistors of such small dimensions tend to have significant leakage current, or sub-threshold conduction, Therefore to maintain the power consumption of integrated circuits having a large number of small, i.e., “leaky” transistors at a reasonable level, it has become common to reduce the power supply voltage.
Even in circumstances in which leakage and dielectric breakdown are not issues, those skilled in the art of integrated circuit design recognize that lowering the supply voltage to a circuit is a significant factor in reducing power consumption.
In response to various motivations, such as those mentioned above, there has been an on-going trend to reduce power supply voltages. One consequence of this trend is that many systems or applications have various circuits with different voltage supply requirements. For example, a system may have some components that operate at 5 volts, and others that operate at 3.3 volts. Similarly, a single integrated circuit may have portions therein which operate at different voltages, for example, 3.3 volts and 1.8 volts. It will be appreciated that a signal that is generated in one voltage supply domain, may need to be level-shifted in order to properly interact with circuits that operate in a different power supply domain. In another example familiar to those skilled in the art, a control signal generated by an integrated circuit and having a first voltage range, is required to drive external circuitry which itself has an output at a second higher voltage, necessitating a level shift of the control signal voltage so that the control signal can be used to properly drive the transistors of the external circuitry operating at a higher voltage.
Various level-shifting circuits have been developed in order to provide the level-shifting functionality mentioned above. In a conventional arrangement, a resistive voltage divider between power and ground, with its intermediate node tied to the H-bridge drive transistor input gates is used to generate the DC bias voltage for the level-shift. Unfortunately, one drawback of conventional resistor divider type level-shifters of the H-bridge configuration with capacitively coupled input signals, is that the performance of such level-shifters is dependent upon the duty cycle of the input signals, and is further dependent on variations in the supply voltage.
What is needed are methods and apparatus for providing level shifters with capacitively coupled inputs that have performance characteristics which are substantially independent of the duty cycle of the input signals, and of variations in the supply voltage, and which are further operable to substantially turn off current flow when a short-circuit condition is detected.